ARM & Samsung Test First eMRAM Compiler, New Process Nodes

Arm Logo 2018 AM AH 1

The ongoing collaborative efforts between Samsung and handset processor maker ARM have now tested the industry’s first Embedded MRAM (eMRAM) compiler IP and at least three new physical processor IPs. The first of the new innovations is arguably the most important for the companies since it is a new cost-effect and non-volatile memory option. While the current eFlash tech requires more than twelve additional masks at 40nm or smaller, eMRAM can work with as few as three. Moreover, it can “generate instances” which replace Flash, EEPROM, and SRAM/data bugger memories within a single non-volatile flash memory. ARM says that should make it much better suited for IoT applications which need to be both cost and power efficient. The first test chip tapeout has now been completed for the new IP and the results show that the technology should be more scalable, faster, and power-efficient. Moreover, it should shorten the time between design and rollout of semiconductor designs while also reducing complexity and being more cost-effective in terms of design resources. The current expectation is that EMRAM will be ready to ship to customers by the fourth quarter of this year.

The two have also been hard at work creating new physical ARM IP – processor cores to be used in customer SoCs – on Samsung’s 11nm Low Power Plus (11LPP), 7nm Low Power Plus (7LPP), and 5nm Low Power Early (5LPE) processes. New details about those have been revealed with ARM’s announcement of its latest achievements with Samsung. Like the prior innovation, the new processes should reduce time, resources, and complexity for customers using ARM’s processor cores. That’s thanks to the new components being built on Samsung Foundry’s Extreme ultraviolet (EUV) lithography. However, the first of the new physical IP, the 11LLp, is based primarily on Samsung’s 14nm 14LPP FinFET process. The new IP scales back to 11nm and supports clocks of upwards of 2GHz. In combination with support for Automotive AECQ100 Grade 1 add-on, ASIL-B support, and Automotive Safety Package, the technology should be well suited for just about any implementation from automotive to wearables. It’s also available now for ARM’s lead partners.

The 7LPP and 5LPE EUV processes, meanwhile, will be ready by third quarter 2018 and early next year according to ARM. They’re also expected to be quite a bit more powerful than previous physical core IP. In fact, the tech should support CPU frequencies above 3GHz according to the company, alongside 1.8V and 3.3V GPIO and support for HD and UHG logic architectures. ARM intends them to be best suited for both high-end mobile and high-performance computing applications, so these could show up in future Chromebooks or Snapdragon-powered PCs, in addition to Android smartphones.