TSMC Planning Risk Production 7nm Chipsets For Q2 Of 2017

TSMC, Taiwan Semiconductor Manufacturing Company, has today certified the Synopsys intellectual property tools that it will use to develop and bring 7nm chipsets to the market. TSMC is in battle with other chipset foundries in a race to the smallest commercially available chipset, because the smaller the chipset, the lower the power consumption, heat output and theoretically quicker the chipset can run. This is because the smaller the chipset, the less voltage that is needed in order to drive electrons across a shorter space (thus cutting down the time it takes for them to travel). Both power consumption and heat output are proportional to the square of the voltage applied, so a comparatively small reduction in the volts used as part of a chipset, the end benefit is relatively large. TSMC explained that their 7nm FinFET chipset designs include a number of advanced features such as parametric on chip variation (POCV), advanced waveform propagation (AWP) and liberty variation format (LVF).

TSMC has effectively signed off the Synopsys digital and custom implementation tools for the new, smaller chipset technology and the company has multiple chip designs already in development by early adopter customers. The advantage of using the Synopsys solution is that it means multiple customers can benefit from the new manufacturing size using IC Compiler II and the Galaxy design platform. In short, it should allow customers to design new 7nm chipsets and bring them to market at an accelerated rate. As for when TSMC is planning to produce 7nm chipsets, the company explained that it should be producing risk production chips by the second quarter 2017. This will be too late for the 2017 flagship devices, so instead we may be seeing 7nm System-on-Chips in devices the following year.

Samsung has recently announced that it is concentrating on 10nm chipsets first and if TSMC can manage to leapfrog Samsung's manufacturing process, this will be good news for the chipset industry. Each reduction in manufacturing process size is incrementally more difficult than the previous generation, so the smaller our chipsets get, the more expensive the development costs. It was only eighteen months ago when the majority of chipsets were being built at the 28nm process size and Samsung's Exynos 7420 stole a technological lead over the competition as when it was released in 2015, it was the first chipset built at the 14nm size.

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About the Author

David Steele

Senior Staff Writer
I grew up with 8-bit computers and moved into PDAs in my professional life, using a number of devices from early Windows CE clamshells and later. Today, my main devices are a Nexus 5X, a Sony Xperia Z Tablet and a coffee cup.